Advantech ADAM-6051 Modbus register map

Also covers ADAM-6051-D

16-channel isolated digital I/O module with counters (14 DI, 2 DO), Modbus TCP

Official
131 registers
Modbus TCP
Revision 2 · 2026-10-17
Identity: model

Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.

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Communication

Protocol: Modbus TCP
Unit ID: 1
TCP port: 502
Byte / word order: CDAB · bytes big-endian, words low first (word swap)
Addresses: 1-based · wire address = address − 1

Connection values are defaults: the device may be configured differently.

Map

Registers: 51 holding registers, 80 coils
Groups: 6
Revision: 2 · 2026-10-17
Added: 2026-10-14 (2026-10-14)
File: maps/advantech/adam-6051.mbmap.json · 19 KB · history
SHA-256: 9a0096b7766e4fe34194a1f15c4b2c98230676d89a9dbc212ed29145113ae986
Manufacturer: advantech.com

Device identity

What a tool can read to check that this map fits the connected device (SPEC.md section 4.7). Registers with a role are read like any other register.

Registers
Role	Register	Address	Type	Values
Model	Module name 1	holding 211	uint16	0x6051 = ADAM-6051

Sources and notes

ADAM-6000 Series User Manual · version Edition 9
Appendix B.2, ADAM-6051

Source: Advantech, "ADAM-6000 Series User Manual", Edition 9, Appendix B.2 (I/O Modbus mapping tables)

Addresses are the Modicon numbers of the manual (00001 = coil 1, 40001 = holding register 1).
32-bit counters and pulse settings are low word first (the manual: counter = (40002) × 65536 + (40001)).
The manual lists no coils for the two digital outputs; use the DO word at 40303.
Some registers (floats, GCL, diagnostics) need the CE or D version of the module.

Area	Address	Type	Access	Unit	Scale	Description
CO	1	bool	R
CO	2	bool	R
CO	3	bool	R
CO	4	bool	R
CO	5	bool	R
CO	6	bool	R
CO	7	bool	R
CO	8	bool	R
CO	9	bool	R
CO	10	bool	R
CO	11	bool	R
CO	12	bool	R
CO	13	bool	R
CO	14	bool	R
CO	17	bool	RW
CO	18	bool	RW
CO	33	bool	RW
CO	34	bool	W			Write 1 to clear
CO	35	bool	RW			Returns to 0 once read
CO	36	bool	RW			Write 0 to clear
CO	37	bool	RW
CO	38	bool	W			Write 1 to clear
CO	39	bool	RW			Returns to 0 once read
CO	40	bool	RW			Write 0 to clear
CO	41	bool	RW
CO	42	bool	W			Write 1 to clear
CO	43	bool	RW			Returns to 0 once read
CO	44	bool	RW			Write 0 to clear
CO	45	bool	RW
CO	46	bool	W			Write 1 to clear
CO	47	bool	RW			Returns to 0 once read
CO	48	bool	RW			Write 0 to clear
CO	49	bool	RW
CO	50	bool	W			Write 1 to clear
CO	51	bool	RW			Returns to 0 once read
CO	52	bool	RW			Write 0 to clear
CO	53	bool	RW
CO	54	bool	W			Write 1 to clear
CO	55	bool	RW			Returns to 0 once read
CO	56	bool	RW			Write 0 to clear
CO	57	bool	RW
CO	58	bool	W			Write 1 to clear
CO	59	bool	RW			Returns to 0 once read
CO	60	bool	RW			Write 0 to clear
CO	61	bool	RW
CO	62	bool	W			Write 1 to clear
CO	63	bool	RW			Returns to 0 once read
CO	64	bool	RW			Write 0 to clear
CO	65	bool	RW
CO	66	bool	W			Write 1 to clear
CO	67	bool	RW			Returns to 0 once read
CO	68	bool	RW			Write 0 to clear
CO	69	bool	RW
CO	70	bool	W			Write 1 to clear
CO	71	bool	RW			Returns to 0 once read
CO	72	bool	RW			Write 0 to clear
CO	73	bool	RW
CO	74	bool	W			Write 1 to clear
CO	75	bool	RW			Returns to 0 once read
CO	76	bool	RW			Write 0 to clear
CO	77	bool	RW
CO	78	bool	W			Write 1 to clear
CO	79	bool	RW			Returns to 0 once read
CO	80	bool	RW			Write 0 to clear
CO	81	bool	RW
CO	82	bool	W			Write 1 to clear
CO	83	bool	RW			Returns to 0 once read
CO	84	bool	RW			Write 0 to clear
CO	85	bool	RW
CO	86	bool	W			Write 1 to clear
CO	87	bool	RW			Returns to 0 once read
CO	88	bool	RW			Write 0 to clear
HR	1	uint32 CDAB	R			In frequency mode the low register is the frequency in 0.1 Hz
HR	3	uint32 CDAB	R
HR	5	uint32 CDAB	R
HR	7	uint32 CDAB	R
HR	9	uint32 CDAB	R
HR	11	uint32 CDAB	R
HR	13	uint32 CDAB	R
HR	15	uint32 CDAB	R
HR	17	uint32 CDAB	R
HR	19	uint32 CDAB	R
HR	21	uint32 CDAB	R
HR	23	uint32 CDAB	R
HR	25	uint32 CDAB	R
HR	27	uint32 CDAB	R
HR	29	uint32 CDAB	RW	ms	×0.1
HR	31	uint32 CDAB	RW	ms	×0.1
HR	33	uint32 CDAB	RW	ms	×0.1
HR	35	uint32 CDAB	RW	ms	×0.1
HR	37	uint32 CDAB	RW			0 = continuous pulses
HR	39	uint32 CDAB	RW
HR	41	uint32 CDAB	RW			Extra pulses during generation
HR	43	uint32 CDAB	RW
HR	301	uint16	R			Bit n = DIn
HR	303	uint16	RW			Bit n = DOn
HR	211	uint16	R			Model number in hexadecimal, e.g. 0x6050
HR	212	uint16	R
CO	301	bool	W
CO	302	bool	W

Help improve this map

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Suggest a correctionEdit the file on GitHub; it opens a pull request.
Report a problemA wrong address, type, scale or byte order.
Read the formatWhat each key of the file means (SPEC.md).