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  2. Advantech
  3. ADAM-6060

Advantech ADAM-6060 Modbus register map

Also covers ADAM-6060-D

Digital input and relay output module (6 DI, 6 relays), Modbus TCP

  • Official
  • 102 registers
  • Modbus TCP
  • Revision 2 · 2026-10-17
  • Identity: model

Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.

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Communication

Protocol
Modbus TCP
Unit ID
1
TCP port
502
Byte / word order
CDAB · bytes big-endian, words low first (word swap)
Addresses
1-based · wire address = address − 1

Connection values are defaults: the device may be configured differently.

Map

Registers
58 holding registers, 44 coils
Groups
6
Revision
2 · 2026-10-17
Added
()
File
maps/advantech/adam-6060.mbmap.json · 15 KB · history
SHA-256
8a06e51feafe108efcb5af6634987ff2c8304511fb5de1d9d9764c6c744fbeaf
Manufacturer
advantech.com

Device identity

What a tool can read to check that this map fits the connected device (SPEC.md section 4.7). Registers with a role are read like any other register.

Registers
RoleRegisterAddressTypeValues
Model Module name 1 holding 211 uint16 0x6060 = ADAM-6060

Sources and notes

Source: Advantech, "ADAM-6000 Series User Manual", Edition 9, Appendix B.2 (I/O Modbus mapping tables)

  • Addresses are the Modicon numbers of the manual (00001 = coil 1, 40001 = holding register 1).
  • 32-bit counters and pulse settings are low word first (the manual: counter = (40002) × 65536 + (40001)).
  • Some registers (floats, GCL, diagnostics) need the CE or D version of the module.
AreaAddressNameTypeAccessUnitScaleDescription
CO 1 bool R
CO 2 bool R
CO 3 bool R
CO 4 bool R
CO 5 bool R
CO 6 bool R
CO 17 bool RW
CO 18 bool RW
CO 19 bool RW
CO 20 bool RW
CO 21 bool RW
CO 22 bool RW
CO 33 bool RW
CO 34 bool W Write 1 to clear
CO 35 bool RW Returns to 0 once read
CO 36 bool RW Write 0 to clear
CO 37 bool RW
CO 38 bool W Write 1 to clear
CO 39 bool RW Returns to 0 once read
CO 40 bool RW Write 0 to clear
CO 41 bool RW
CO 42 bool W Write 1 to clear
CO 43 bool RW Returns to 0 once read
CO 44 bool RW Write 0 to clear
CO 45 bool RW
CO 46 bool W Write 1 to clear
CO 47 bool RW Returns to 0 once read
CO 48 bool RW Write 0 to clear
CO 49 bool RW
CO 50 bool W Write 1 to clear
CO 51 bool RW Returns to 0 once read
CO 52 bool RW Write 0 to clear
CO 53 bool RW
CO 54 bool W Write 1 to clear
CO 55 bool RW Returns to 0 once read
CO 56 bool RW Write 0 to clear
HR 1 uint32 CDAB R In frequency mode the low register is the frequency in 0.1 Hz
HR 3 uint32 CDAB R
HR 5 uint32 CDAB R
HR 7 uint32 CDAB R
HR 9 uint32 CDAB R
HR 11 uint32 CDAB R
HR 13 uint32 CDAB RW ms ×0.1
HR 15 uint32 CDAB RW ms ×0.1
HR 17 uint32 CDAB RW ms ×0.1
HR 19 uint32 CDAB RW ms ×0.1
HR 21 uint32 CDAB RW ms ×0.1
HR 23 uint32 CDAB RW ms ×0.1
HR 25 uint32 CDAB RW ms ×0.1
HR 27 uint32 CDAB RW ms ×0.1
HR 29 uint32 CDAB RW ms ×0.1
HR 31 uint32 CDAB RW ms ×0.1
HR 33 uint32 CDAB RW ms ×0.1
HR 35 uint32 CDAB RW ms ×0.1
HR 37 uint32 CDAB RW 0 = continuous pulses
HR 39 uint32 CDAB RW
HR 41 uint32 CDAB RW
HR 43 uint32 CDAB RW
HR 45 uint32 CDAB RW
HR 47 uint32 CDAB RW
HR 49 uint32 CDAB RW Extra pulses during generation
HR 51 uint32 CDAB RW
HR 53 uint32 CDAB RW
HR 55 uint32 CDAB RW
HR 57 uint32 CDAB RW
HR 59 uint32 CDAB RW
HR 301 uint16 R Bit n = DIn
HR 303 uint16 RW Bit n = DOn
HR 211 uint16 R Model number in hexadecimal, e.g. 0x6050
HR 212 uint16 R
CO 301 bool W
CO 302 bool W
CO 303 bool W
CO 304 bool W
CO 305 bool W
CO 306 bool W
CO 307 bool W
CO 308 bool W
HR 305 bool bit 0 RW
HR 305 bool bit 1 RW
HR 305 bool bit 2 RW
HR 305 bool bit 3 RW
HR 305 bool bit 4 RW
HR 305 bool bit 5 RW
HR 305 bool bit 6 RW
HR 305 bool bit 7 RW
HR 305 bool bit 8 RW
HR 305 bool bit 9 RW
HR 305 bool bit 10 RW
HR 305 bool bit 11 RW
HR 305 bool bit 12 RW
HR 305 bool bit 13 RW
HR 305 bool bit 14 RW
HR 305 bool bit 15 RW
HR 311 uint32 CDAB R
HR 313 uint32 CDAB R
HR 315 uint32 CDAB R
HR 317 uint32 CDAB R
HR 319 uint32 CDAB R
HR 321 uint32 CDAB R

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