Alfa Instrumentos 3100D / 3100DS Modbus register map
Also covers 3104D, 3107D, 3104DS, 3107DS
Weighing indicators with Modbus RTU and Modbus TCP
- Unofficial
- 62 registers
- Modbus TCP and RTU
- Revision 1 · 2026-10-18
Unofficial: Copied from an unofficial source and not tested. Read it as a draft and check a value on the real device before you rely on the rest. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.
Communication
- Protocol
- Modbus TCP and RTU
- Unit ID
- 1
- TCP port
- 502default
- Serial
- 9600 8N1 · 9600 baud, 8 data bits, none parity, 1 stop bit
- Byte / word order
- ABCD · bytes big-endian, words high first
- Addresses
- 0-based
Connection values are defaults: the device may be configured differently.
Map
- Registers
- 62 holding registers
- Groups
- 4
- Translation tables
- 5
- Revision
- 1 · 2026-10-18
- Added
- ()
- File
- maps/alfa-instrumentos/3100d-3100ds.mbmap.json · 13 KB · history
- SHA-256
- df2cc7241747aa79685e56ffc277e0309acaf5f0e431860c94b96b64a17a1ccb
- Manufacturer
- alfainstrumentos.com.br
Sources and notes
- Manual do usuário Indicadores de Pesagem Linha 3100D/DS (0132-MN-03) Section 6.1, Modbus TCP commands (same register layout as Modbus RTU)
Source: Alfa Instrumentos user manual 0132-MN-03, 3100D/DS weighing indicators, Modbus TCP commands
- The manual says the Modbus TCP commands keep the structure of the Modbus RTU ones; the RTU command manual 0060MN was not available, so this map follows section 6.1 of 0132-MN-03.
- Registers are numbered as in the manual, which gives the same number in decimal and in hexadecimal start addresses (register 80 is 0x0050).
- Supported functions: 0x03 read, 0x06 write one register, 0x10 write several registers.
- The weight and tare are 32-bit counts; the manual does not state the word order (big assumed), the sign (a separate flag in register 80) or a scale. Divide by 10 to the power of the decimal places in bits 0 to 2 of register 80.
- Registers 160 to 165 set the clock together with function 0x10; the manual lists register 163 as hour and the quantity as 6.
- The manual gives the editable tare as start register 850 with quantity 2 but names registers 851 and 852; 851 and 852 are used here.
- Serial defaults: 8 data bits, no parity, 2 stop bits; baud rates 4800 to 230400. Factory device address 01.
- Level numbering: values and states are given for levels 0 to 7 depending on the model (3104D/DS has 4 levels, 3107D/DS has 8).
| Area | Address | Name | Type | Access | Unit | Scale | Description |
|---|---|---|---|---|---|---|---|
| HR | 80 | bool bit 3 | R | ||||
| HR | 80 | bool bit 4 | R | ||||
| HR | 80 | bool bit 5 | R | ||||
| HR | 80 | bool bit 6 | R | ||||
| HR | 80 | bool bit 8 | R | ||||
| HR | 80 | uint16 bits 0–2 | R | Bits 0 to 2: decimals of the weight and tare values | |||
| HR | 80 | uint16 bits 9–12 | R | Bits 9 to 12 | |||
| HR | 81 | bool bit 0 | R | ||||
| HR | 81 | bool bit 1 | R | ||||
| HR | 81 | bool bit 2 | R | ||||
| HR | 81 | bool bit 3 | R | ||||
| HR | 81 | bool bit 8 | R | ||||
| HR | 81 | bool bit 9 | R | ||||
| HR | 81 | bool bit 10 | R | ||||
| HR | 81 | bool bit 11 | R | ||||
| HR | 81 | bool bit 5 | R | 0 = net, 1 = gross | |||
| HR | 81 | bool bit 4 | R | ||||
| HR | 82 | uint32 ABCD | R | Count in the unit and decimals of register 80 | |||
| HR | 84 | uint32 ABCD | R | Count in the unit and decimals of register 80 | |||
| HR | 40 | bool bit 7 | R | 0 = levels 0 to 3, 1 = levels 4 to 7 | |||
| HR | 41 | uint32 ABCD | R | Level 1 when the bank bit is 0, level 4 when 1 | |||
| HR | 43 | uint32 ABCD | R | ||||
| HR | 45 | uint32 ABCD | R | ||||
| HR | 47 | uint32 ABCD | R | ||||
| HR | 60 | uint16 | R | ||||
| HR | 61 | bool bit 0 | R | 0 = normally open, 1 = normally closed | |||
| HR | 63 | bool bit 0 | R | 0 = does not latch, 1 = latches | |||
| HR | 63 | bool bit 1 | R | 0 = does not latch, 1 = latches | |||
| HR | 64 | bool bit 0 | R | 0 = does not latch, 1 = latches | |||
| HR | 64 | bool bit 1 | R | 0 = does not latch, 1 = latches | |||
| HR | 65 | bool bit 0 | R | 0 = does not latch, 1 = latches | |||
| HR | 65 | bool bit 1 | R | 0 = does not latch, 1 = latches | |||
| HR | 65 | bool bit 2 | R | 0 = does not latch, 1 = latches | |||
| HR | 30 | uint16 | W | Write before the level values: bit 6 = store, bit 9 set = levels 4 to 7, bit 10 set = levels 0 to 3 | |||
| HR | 31 | uint32 ABCD | W | ||||
| HR | 33 | uint32 ABCD | W | ||||
| HR | 35 | uint32 ABCD | W | ||||
| HR | 37 | uint32 ABCD | W | ||||
| HR | 90 | bool bit 0 | W | Write 1 to run (bit 0 of the remote command register) | |||
| HR | 90 | bool bit 1 | W | Write 1 to run (bit 1 of the remote command register) | |||
| HR | 90 | bool bit 2 | W | Write 1 to run (bit 2 of the remote command register) | |||
| HR | 90 | bool bit 3 | W | Write 1 to run (bit 3 of the remote command register) | |||
| HR | 90 | bool bit 4 | W | Write 1 to run (bit 4 of the remote command register) | |||
| HR | 90 | bool bit 5 | W | Write 1 to run (bit 5 of the remote command register) | |||
| HR | 90 | bool bit 6 | W | Write 1 to run (bit 6 of the remote command register) | |||
| HR | 230 | uint16 | W | Bits 0 and 1 select automatic and manual zero; bit 8 enables initial zero | |||
| HR | 250 | uint16 | W | ||||
| HR | 270 | uint16 | W | ||||
| HR | 851 | uint32 ABCD | W | Value used when the tare mode is editable | |||
| HR | 170 | uint16 | R | ||||
| HR | 171 | uint16 | R | ||||
| HR | 172 | uint16 | R | ||||
| HR | 173 | uint16 | R | ||||
| HR | 174 | uint16 | R | ||||
| HR | 175 | uint16 | R | ||||
| HR | 176 | uint16 | R | ||||
| HR | 160 | uint16 | W | Write the six registers 160 to 165 together (function 0x10) | |||
| HR | 161 | uint16 | W | Write the six registers 160 to 165 together (function 0x10) | |||
| HR | 162 | uint16 | W | Write the six registers 160 to 165 together (function 0x10) Year has the last two digits. | |||
| HR | 163 | uint16 | W | Write the six registers 160 to 165 together (function 0x10) | |||
| HR | 164 | uint16 | W | Write the six registers 160 to 165 together (function 0x10) | |||
| HR | 165 | uint16 | W | Write the six registers 160 to 165 together (function 0x10) |
No registers match
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Help improve this map
- I tested it on a deviceReport whether it worked, even if you did not write the map.
- Suggest a correctionEdit the file on GitHub; it opens a pull request.
- Report a problemA wrong address, type, scale or byte order.
- Read the formatWhat each key of the file means (SPEC.md).