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Treetech DM Modbus register map

Also covers DMX

Digital input module with 8, 16 or 24 inputs: input states, memory buffer and active period counters

  • Official
  • 90 registers
  • Modbus RTU
  • Revision 1 · 2026-11-10

Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.

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Communication

Protocol
Modbus RTU
Unit ID
1
Serial
9600 8N2 · 9600 baud, 8 data bits, none parity, 2 stop bits
Byte / word order
ABCD · bytes big-endian, words high first
Addresses
0-based

Connection values are defaults: the device may be configured differently.

Map

Registers
90 holding registers
Groups
3
Translation tables
3
Revision
1 · 2026-11-10
Firmware
3.2
Added
()
File
maps/treetech/dmx.mbmap.json · 15 KB · history
SHA-256
22536df28a189e0e092ba5c851459be23e3c532f72fcc0ece53780d7492099dc
Manufacturer
treetech.com.br

Sources and notes

Source: Treetech DM Communication Protocol Map MAP-011, rev. 1.10

  • Modbus RTU on RS-485, FC03 (read) and FC06 and FC16 (write) only. Addresses are 0-based, as sent on the wire. Every register is a holding register, including the input states.
  • The document gives fixed serial settings of 9600 bit/s, 8 data bits, no parity and 2 stop bits. It gives no slave address; 1 is assumed here.
  • The linked document is titled DM (Data Acquisition and Control Module) and covers the DM1, DM2 and DM3 versions with 8, 16 or 24 digital inputs (Y1 to Y24). It was requested as DMX.
  • Input states and the memory buffer are bit fields, one entry per bit. The document leaves the register numbers of the last five rows (firmware version and release, and the three buffer reset commands) blank, so they are not in this map.
  • The document was written for firmware 3.2. Written from that document; this map has not been tested on a device.
AreaAddressNameTypeAccessUnitScaleDescription
HR 0 bool bit 0 R
HR 0 bool bit 1 R
HR 0 bool bit 2 R
HR 0 bool bit 3 R 8-input module
HR 0 bool bit 4 R 16-input module
HR 0 bool bit 5 R 24-input module
HR 0 bool bit 6 R
HR 0 bool bit 7 R
HR 1 bool bit 0 R
HR 1 bool bit 1 R
HR 1 bool bit 2 R
HR 1 bool bit 3 R
HR 1 bool bit 4 R
HR 1 bool bit 5 R
HR 1 bool bit 6 R
HR 1 bool bit 7 R
HR 2 bool bit 0 R
HR 2 bool bit 1 R
HR 2 bool bit 2 R
HR 2 bool bit 3 R
HR 2 bool bit 4 R
HR 2 bool bit 5 R
HR 2 bool bit 6 R
HR 2 bool bit 7 R
HR 3 bool bit 0 R
HR 3 bool bit 1 R
HR 3 bool bit 2 R
HR 3 bool bit 3 R
HR 3 bool bit 4 R
HR 3 bool bit 5 R
HR 3 bool bit 6 R
HR 3 bool bit 7 R
HR 4 uint16 R cycles
HR 5 uint16 R cycles
HR 6 uint16 R cycles
HR 7 uint16 R cycles
HR 8 uint16 R cycles
HR 9 uint16 R cycles
HR 10 uint16 R cycles
HR 11 uint16 R cycles
HR 12 uint16 R cycles
HR 13 uint16 R cycles
HR 14 uint16 R cycles
HR 15 uint16 R cycles
HR 16 uint16 R cycles
HR 17 uint16 R cycles
HR 18 uint16 R cycles
HR 19 uint16 R cycles
HR 20 uint16 R cycles
HR 21 uint16 R cycles
HR 22 uint16 R cycles
HR 23 uint16 R cycles
HR 24 uint16 R cycles
HR 25 uint16 R cycles
HR 26 uint16 R cycles
HR 27 uint16 R cycles
HR 28 uint16 RW ms Length of one cycle used to count the active period
HR 29 uint16 RW ms Delay before the counting starts
HR 30 bool bit 0 R
HR 30 bool bit 1 R
HR 30 bool bit 2 R
HR 30 bool bit 3 R 8-input module
HR 30 bool bit 4 R 16-input module
HR 30 bool bit 5 R 24-input module
HR 30 bool bit 6 R
HR 30 bool bit 7 R
HR 31 bool bit 0 R
HR 31 bool bit 1 R
HR 31 bool bit 2 R
HR 31 bool bit 3 R
HR 31 bool bit 4 R
HR 31 bool bit 5 R
HR 31 bool bit 6 R
HR 31 bool bit 7 R
HR 32 bool bit 0 R
HR 32 bool bit 1 R
HR 32 bool bit 2 R
HR 32 bool bit 3 R
HR 32 bool bit 4 R
HR 32 bool bit 5 R
HR 32 bool bit 6 R
HR 32 bool bit 7 R
HR 33 bool bit 0 R
HR 33 bool bit 1 R
HR 33 bool bit 2 R
HR 33 bool bit 3 R
HR 33 bool bit 4 R
HR 33 bool bit 5 R
HR 33 bool bit 6 R
HR 33 bool bit 7 R

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