Electron do Brasil DVR Modbus register map
Digital voltage regulator relay (ANSI 90) for tap changers with eight regulation sets, parallel operation and Modbus RTU
- Official
- 351 registers
- Modbus RTU
- Revision 1 · 2026-11-10
Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.
Communication
- Protocol
- Modbus RTU
- Unit ID
- 1
- Serial
- 9600 8N1 · 9600 baud, 8 data bits, none parity, 1 stop bit
- Byte / word order
- ABCD · bytes big-endian, words high first
- Addresses
- 1-based · wire address = address − 1
Connection values are defaults: the device may be configured differently.
Map
- Registers
- 351 holding registers
- Groups
- 16
- Translation tables
- 20
- Revision
- 1 · 2026-11-10
- Added
- ()
- File
- maps/electron/dvr.mbmap.json · 66 KB · history
- SHA-256
- e28e68ea6aa3a6dd1042aa5d3978d1ec9737c5d931a2098fad4141a46fb6a9d4
- Manufacturer
- electron.com.br
Sources and notes
- Mapa de Registradores MODBUS RTU, DVR (Relé Regulador de Tensão Digital) · version 4.1 linked in issue #127
Source: Electron do Brasil, Mapa de Registradores MODBUS RTU, DVR (Relé Regulador de Tensão Digital), v4.1
- All registers are holding registers. The document numbers them from 1 and calls the type Holding Register (40.000), so the addresses are 1-based (address on the wire = number minus 1). The document does not say so explicitly: if a read fails, try address_base 0.
- The document allows 2400 to 57600 bps with automatic baud rate detection, 8 data bits and no, even or odd parity. It gives no default baud rate, stop bits or slave address: 9600 N 1 and unit 1 are placeholders.
- Scales written as 1:N in the document are read as raw / N. An offset such as -100 (tap positions) is added to the raw value, and -250:10 (line drop components, raw 0 to 500) is read as raw / 10 - 25. These readings are interpretations of the document and are not confirmed on a device.
- The document lists eight regulation sets with the same layout, 30 registers apart (10, 40, 70 ... 220). Set 1 has no schedule registers. The ranges printed for set 7 and some typing errors in the document were not used.
- Primary side measurements are labelled kV, kA, MVA, MW and MVar after the display table of the document, but the measurement table gives no unit and its ranges do not fit a 16-bit value at the stated scale: check them against the display.
- Left out because the document is unclear, repeated or inconsistent: the phase selector (register 1), registers 275 and 276, 293, 305 and 306, the relay configuration registers 430 to 564 (functions, logic, timing and triggers of 14 relays), the parallel network registers 570 to 724, the analog output range registers 340 to 374, the display line registers 379 to 390 and the maintenance and history registers 801 to 884.
- Registers 3, 214, 260, 287 and 899 are bit fields, one entry per bit.
- Written from the manufacturer's document; not tested on a device.
| Area | Address | Name | Type | Access | Unit | Scale | Description |
|---|---|---|---|---|---|---|---|
| HR | 2 | uint16 | RW | ||||
| HR | 3 | bool bit 0 | RW | ||||
| HR | 3 | bool bit 1 | RW | ||||
| HR | 3 | bool bit 2 | RW | ||||
| HR | 3 | bool bit 3 | RW | ||||
| HR | 3 | bool bit 4 | RW | ||||
| HR | 3 | bool bit 5 | RW | ||||
| HR | 3 | bool bit 6 | RW | ||||
| HR | 3 | bool bit 7 | RW | ||||
| HR | 10 | uint16 | RW | V | ×0.1 | ||
| HR | 11 | uint16 | RW | % | ×0.1 | ||
| HR | 12 | uint16 | RW | % | ×0.1 | ||
| HR | 13 | uint16 | RW | % | ×0.1 | ||
| HR | 14 | uint16 | RW | ||||
| HR | 15 | uint16 | RW | s | |||
| HR | 16 | uint16 | RW | s | |||
| HR | 17 | uint16 | RW | s | |||
| HR | 18 | uint16 | RW | s | |||
| HR | 19 | uint16 | RW | s | |||
| HR | 20 | uint16 | RW | s | |||
| HR | 21 | uint16 | RW | s | |||
| HR | 22 | uint16 | RW | ||||
| HR | 23 | uint16 | RW | V | ×0.1 −25 | ||
| HR | 24 | uint16 | RW | V | ×0.1 −25 | ||
| HR | 25 | uint16 | RW | % | ×0.1 | ||
| HR | 26 | uint16 | RW | % | ×0.1 | ||
| HR | 40 | uint16 | RW | V | ×0.1 | ||
| HR | 41 | uint16 | RW | % | ×0.1 | ||
| HR | 42 | uint16 | RW | % | ×0.1 | ||
| HR | 43 | uint16 | RW | % | ×0.1 | ||
| HR | 44 | uint16 | RW | ||||
| HR | 45 | uint16 | RW | s | |||
| HR | 46 | uint16 | RW | s | |||
| HR | 47 | uint16 | RW | s | |||
| HR | 48 | uint16 | RW | s | |||
| HR | 49 | uint16 | RW | s | |||
| HR | 50 | uint16 | RW | s | |||
| HR | 51 | uint16 | RW | s | |||
| HR | 52 | uint16 | RW | ||||
| HR | 53 | uint16 | RW | V | ×0.1 −25 | ||
| HR | 54 | uint16 | RW | V | ×0.1 −25 | ||
| HR | 55 | uint16 | RW | % | ×0.1 | ||
| HR | 56 | uint16 | RW | % | ×0.1 | ||
| HR | 57 | uint16 | RW | ||||
| HR | 58 | uint16 | RW | ||||
| HR | 59 | uint16 | RW | ||||
| HR | 60 | uint16 | RW | ||||
| HR | 61 | uint16 | RW | ||||
| HR | 62 | uint16 | RW | ||||
| HR | 70 | uint16 | RW | V | ×0.1 | ||
| HR | 71 | uint16 | RW | % | ×0.1 | ||
| HR | 72 | uint16 | RW | % | ×0.1 | ||
| HR | 73 | uint16 | RW | % | ×0.1 | ||
| HR | 74 | uint16 | RW | ||||
| HR | 75 | uint16 | RW | s | |||
| HR | 76 | uint16 | RW | s | |||
| HR | 77 | uint16 | RW | s | |||
| HR | 78 | uint16 | RW | s | |||
| HR | 79 | uint16 | RW | s | |||
| HR | 80 | uint16 | RW | s | |||
| HR | 81 | uint16 | RW | s | |||
| HR | 82 | uint16 | RW | ||||
| HR | 83 | uint16 | RW | V | ×0.1 −25 | ||
| HR | 84 | uint16 | RW | V | ×0.1 −25 | ||
| HR | 85 | uint16 | RW | % | ×0.1 | ||
| HR | 86 | uint16 | RW | % | ×0.1 | ||
| HR | 87 | uint16 | RW | ||||
| HR | 88 | uint16 | RW | ||||
| HR | 89 | uint16 | RW | ||||
| HR | 90 | uint16 | RW | ||||
| HR | 91 | uint16 | RW | ||||
| HR | 92 | uint16 | RW | ||||
| HR | 100 | uint16 | RW | V | ×0.1 | ||
| HR | 101 | uint16 | RW | % | ×0.1 | ||
| HR | 102 | uint16 | RW | % | ×0.1 | ||
| HR | 103 | uint16 | RW | % | ×0.1 | ||
| HR | 104 | uint16 | RW | ||||
| HR | 105 | uint16 | RW | s | |||
| HR | 106 | uint16 | RW | s | |||
| HR | 107 | uint16 | RW | s | |||
| HR | 108 | uint16 | RW | s | |||
| HR | 109 | uint16 | RW | s | |||
| HR | 110 | uint16 | RW | s | |||
| HR | 111 | uint16 | RW | s | |||
| HR | 112 | uint16 | RW | ||||
| HR | 113 | uint16 | RW | V | ×0.1 −25 | ||
| HR | 114 | uint16 | RW | V | ×0.1 −25 | ||
| HR | 115 | uint16 | RW | % | ×0.1 | ||
| HR | 116 | uint16 | RW | % | ×0.1 | ||
| HR | 117 | uint16 | RW | ||||
| HR | 118 | uint16 | RW | ||||
| HR | 119 | uint16 | RW | ||||
| HR | 120 | uint16 | RW | ||||
| HR | 121 | uint16 | RW | ||||
| HR | 122 | uint16 | RW | ||||
| HR | 130 | uint16 | RW | V | ×0.1 | ||
| HR | 131 | uint16 | RW | % | ×0.1 | ||
| HR | 132 | uint16 | RW | % | ×0.1 | ||
| HR | 133 | uint16 | RW | % | ×0.1 | ||
| HR | 134 | uint16 | RW |
No registers match
Try part of the name, an address (decimal or 0x hex) or clear the filters.
Help improve this map
- I tested it on a deviceReport whether it worked, even if you did not write the map.
- Suggest a correctionEdit the file on GitHub; it opens a pull request.
- Report a problemA wrong address, type, scale or byte order.
- Read the formatWhat each key of the file means (SPEC.md).