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  3. Galaxy VL

Schneider Electric Galaxy VL Modbus register map

Also covers Galaxy VL 200-500 kW

Three-phase UPS, 200 to 500 kW: status and alarm bits, input, output and bypass measurements, battery, parallel system and configuration

  • Official
  • 322 registers
  • Revision 1 · 2026-10-18
  • Identity: model, firmware, serial number

Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.

Communication

Protocol
Modbus TCP and RTUdefault
Unit ID
1default
TCP port
502default
Serial
9600 8E1 · 9600 baud, 8 data bits, even parity, 1 stop bit defaults
Byte / word order
ABCD · bytes big-endian, words high first
Addresses
0-based

Connection values are defaults: the device may be configured differently.

Map

Registers
322 holding registers
Groups
24
Translation tables
26
Revision
1 · 2026-10-18
Firmware
from 7.23
Added
()
File
maps/schneider-electric/galaxy-vl.mbmap.json · 52 KB · history
SHA-256
7b8017b9cbcaeb519df2e6cd303d6744601bb3ff1e02023a21a054f5ea131445
Manufacturer
se.com

Device identity

What a tool can read to check that this map fits the connected device (SPEC.md section 4.7). Registers with a role are read like any other register.

Registers
RoleRegisterAddressTypeValues
Firmware Firmware package version holding 4096 string[8]
Model Model number holding 4120 string[16]
Serial number Serial number holding 4136 string[16]

Sources and notes

  • Modbus Register Map: Galaxy VL 200-500 kW · version 990-6447
    all 18 pages

Source: Schneider Electric, Modbus Register Map: Galaxy VL 200-500 kW, 990-6447 (firmware 7.23 and later)

  • Register addresses are the absolute decimal addresses of the manual (Modicon 40001 is address 0).
  • Only function code 3 is supported, so every register is read-only here. Modbus RTU and Modbus TCP are supported; the serial settings are on the UPS display.
  • Status and alarm registers are bit words; bit 0 is the least significant bit and reserved bits are left out. Bits are atomic within one register only.
  • Reading a reserved register alone returns an error; a block read that starts on a valid register returns zeros for undefined ones.
  • The scale of registers 4867-4869, 5123-5125, 5379-5381 and 6144-6153 differs from the Galaxy VS and GPX maps.
AreaAddressNameTypeAccessUnitScaleDescription
HR 1 bool bit 0 R
HR 1 bool bit 1 R
HR 1 bool bit 2 R
HR 1 bool bit 3 R
HR 1 bool bit 9 R
HR 1 bool bit 13 R
HR 1 bool bit 14 R
HR 1 bool bit 15 R
HR 2 bool bit 0 R
HR 2 bool bit 1 R
HR 2 bool bit 2 R
HR 2 bool bit 3 R
HR 2 bool bit 4 R
HR 3 bool bit 0 R
HR 3 bool bit 1 R
HR 3 bool bit 2 R
HR 3 bool bit 3 R
HR 3 bool bit 4 R
HR 3 bool bit 5 R
HR 3 bool bit 6 R
HR 3 bool bit 7 R
HR 3 bool bit 8 R
HR 3 bool bit 9 R
HR 3 bool bit 10 R
HR 3 bool bit 11 R
HR 3 bool bit 12 R
HR 3 bool bit 13 R
HR 3 bool bit 14 R
HR 3 bool bit 15 R
HR 4 bool bit 0 R
HR 4 bool bit 1 R
HR 5 bool bit 0 R
HR 5 bool bit 1 R
HR 5 bool bit 2 R
HR 5 bool bit 3 R
HR 5 bool bit 4 R
HR 5 bool bit 5 R
HR 5 bool bit 6 R
HR 5 bool bit 7 R
HR 5 bool bit 8 R
HR 5 bool bit 9 R
HR 5 bool bit 10 R
HR 5 bool bit 11 R
HR 5 bool bit 12 R
HR 5 bool bit 13 R
HR 5 bool bit 14 R
HR 5 bool bit 15 R
HR 6 bool bit 0 R
HR 6 bool bit 9 R
HR 6 bool bit 10 R
HR 6 bool bit 11 R
HR 6 bool bit 12 R
HR 6 bool bit 13 R
HR 7 bool bit 0 R
HR 7 bool bit 1 R
HR 7 bool bit 2 R
HR 7 bool bit 4 R
HR 7 bool bit 5 R
HR 7 bool bit 6 R
HR 7 bool bit 7 R
HR 7 bool bit 8 R
HR 7 bool bit 9 R
HR 7 bool bit 10 R
HR 7 bool bit 11 R
HR 7 bool bit 12 R
HR 7 bool bit 13 R
HR 7 bool bit 14 R
HR 7 bool bit 15 R
HR 8 bool bit 0 R
HR 8 bool bit 1 R
HR 8 bool bit 7 R
HR 8 bool bit 8 R
HR 8 bool bit 10 R
HR 8 bool bit 11 R
HR 8 bool bit 12 R
HR 11 bool bit 0 R
HR 11 bool bit 1 R
HR 11 bool bit 2 R
HR 11 bool bit 3 R
HR 11 bool bit 4 R
HR 11 bool bit 5 R
HR 11 bool bit 6 R
HR 11 bool bit 7 R
HR 11 bool bit 8 R
HR 11 bool bit 9 R
HR 11 bool bit 10 R
HR 12 bool bit 0 R
HR 12 bool bit 1 R
HR 12 bool bit 2 R
HR 12 bool bit 3 R
HR 12 bool bit 4 R
HR 12 bool bit 5 R
HR 13 bool bit 0 R
HR 13 bool bit 1 R
HR 13 bool bit 2 R
HR 13 bool bit 3 R
HR 13 bool bit 4 R
HR 13 bool bit 5 R
HR 13 bool bit 6 R
HR 13 bool bit 7 R

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