Unipi Technology Axon M205 / M265 Modbus register map

Also covers Axon M265

Unipi Axon M205 and M265 PLC: 20 digital inputs, 4 digital outputs, 14 relay outputs, 1 analog input, 1 analog output, 1 RS485 line, 1-Wire bus (I/O in 2 groups)

Official
335 registers
Modbus TCP
Revision 3 · 2026-11-10

Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.

Download .mbmap.json Raw JSON View on GitHub Suggest a correction Report a problem

Communication

Protocol: Modbus TCP
Unit ID: 0
TCP port: 502
Byte / word order: ABCD · bytes big-endian, words high first
Addresses: 0-based

Connection values are defaults: the device may be configured differently.

Map

Registers: 232 holding registers, 103 coils
Groups: 15
Translation tables: 2
Revision: 3 · 2026-11-10
Added: 2026-11-10 (2026-11-10)
File: maps/unipi/axon-m205-m265.mbmap.json · 67 KB · history
SHA-256: 3345ff73dcb6d6f156c5573584b5d229dd2ce13b194982953925a9f4aba19d21
Manufacturer: www.unipi.technology

Sources and notes

Axon M205 Modbus registers (unipi-axon-m205-modbus-registers.xlsx)
Sheets Registers - group 1, Registers - group 2, Coils - group 1, Coils - group 2, Description; listed on https://kb.unipi.technology/en:hw:04-extensions:downloads
Axon M265 Modbus registers (unipi-axon-m265-modbus-registers.xlsx)
Sheets Registers - group 1, Registers - group 2, Coils - group 1, Coils - group 2, Description; listed on https://kb.unipi.technology/en:hw:04-extensions:downloads

Source: unipi-axon-m205-modbus-registers.xlsx; unipi-axon-m265-modbus-registers.xlsx, Unipi knowledge base page https://kb.unipi.technology/en:hw:04-extensions:downloads

Addresses are those of the column 'Via Unit 0' (Modbus TCP unit id 0), where the groups of an Axon controller share one address space: group 1 starts at 0, group 2 at 100, group 3 at 200, and so on. The spreadsheet also gives per-group addresses for unit ids 1, 2 and 3, which are not used here.
Unipi Axon and Neuron use Modbus TCP. By default the Modbus server listens only on the loopback interface; it can be opened to other interfaces by changing its systemd script (Description sheet). The TCP port and the unit id used here are not stated in the spreadsheet: 502 is the Modbus default.
Registers marked Reserved or Obsolete in the spreadsheet, and those named (Internal), are left out. Multi-register values are big-endian (most significant register first). The spreadsheet types Real as a two-register floating point value, read here as float32; its Description sheet text about half and single precision is ambiguous.
Coils (suffix (coil)) repeat digital inputs, outputs and some settings that also appear as bits of holding registers. Analog values are in the unit selected by the analog input or output configuration register; the spreadsheet gives no unit for them.
Some registers (the RS485 line configuration) have no address in the Via Unit 0 column; they are included for group 1 with the Via Unit 1 address, which is identical, and left out for the other groups.
Registers whose name carries no I/O index are repeated in every group of the controller; the name then ends with (group N).
The documents of M205, M265 list identical registers, so they share this map.

Area	Address	Type	Access	Unit	Scale
HR	0	bool bit 0	R
HR	0	bool bit 1	R
HR	0	bool bit 2	R
HR	0	bool bit 3	R
HR	1	bool bit 0	RW
HR	1	bool bit 1	RW
HR	1	bool bit 2	RW
HR	1	bool bit 3	RW
HR	5	uint16	R
HR	6	bool bit 0	RW
HR	6	bool bit 1	RW
HR	8	uint32 ABCD	RW
HR	10	uint32 ABCD	RW
HR	12	uint32 ABCD	RW
HR	14	uint32 ABCD	RW
HR	16	uint16	RW
HR	17	uint16	RW
HR	18	uint16	RW
HR	19	uint16	RW
HR	20	bool bit 0	RW
HR	20	bool bit 1	RW
HR	20	bool bit 2	RW
HR	20	bool bit 3	RW
HR	21	bool bit 0	RW
HR	21	bool bit 1	RW
HR	21	bool bit 2	RW
HR	21	bool bit 3	RW
HR	22	bool bit 0	RW
HR	22	bool bit 1	RW
HR	22	bool bit 2	RW
HR	22	bool bit 3	RW
HR	500	uint16	RW
HR	501	uint16	RW
HR	502	uint16	RW
HR	503	uint16	RW
HR	504	uint16	RW
HR	1000	uint16	R
HR	1001	uint16 bits 0–7	R
HR	1001	uint16 bits 8–15	R
HR	1002	uint16 bits 0–3	R
HR	1002	uint16 bits 4–7	R
HR	1002	uint16 bits 8–15	R
HR	1003	uint16	R
HR	1004	uint16	R
HR	1005	uint32 ABCD	R
HR	1007	bool bit 0	RW
HR	1007	bool bit 1	RW
HR	1007	bool bit 2	RW
HR	1007	bool bit 3	RW
HR	1008	uint16	RW	ms
HR	1009	uint16	R
HR	1010	uint16	RW	µs	×100
HR	1011	uint16	RW	µs	×100
HR	1012	uint16	RW	µs	×100
HR	1013	uint16	RW	µs	×100
HR	1014	bool bit 0	RW
HR	1014	bool bit 1	RW
HR	1014	bool bit 2	RW
HR	1014	bool bit 3	RW
HR	1015	bool bit 0	RW
HR	1015	bool bit 1	RW
HR	1015	bool bit 2	RW
HR	1015	bool bit 3	RW
HR	1016	bool bit 0	RW
HR	1016	bool bit 1	RW
HR	1016	bool bit 2	RW
HR	1016	bool bit 3	RW
HR	1017	uint16	RW
HR	1018	uint16	RW
HR	1019	uint16	RW
HR	1020	uint16	RW
HR	1021	uint16	RW
HR	1022	uint16	RW
HR	1023	uint16	RW
HR	1024	uint16	RW
HR	1025	uint16	RW
HR	1026	uint16	RW
HR	1027	uint16	RW
HR	1028	uint16	RW
HR	1029	uint16	RW
HR	1030	uint16	RW
HR	3000	float32 ABCD	RW
HR	3002	float32 ABCD	R
HR	100	bool bit 0	R
HR	100	bool bit 1	R
HR	100	bool bit 2	R
HR	100	bool bit 3	R
HR	100	bool bit 4	R
HR	100	bool bit 5	R
HR	100	bool bit 6	R
HR	100	bool bit 7	R
HR	100	bool bit 8	R
HR	100	bool bit 9	R
HR	100	bool bit 10	R
HR	100	bool bit 11	R
HR	100	bool bit 12	R
HR	100	bool bit 13	R
HR	100	bool bit 14	R
HR	100	bool bit 15	R
HR	101	bool bit 0	RW

Help improve this map

I tested it on a deviceReport whether it worked, even if you did not write the map.
Suggest a correctionEdit the file on GitHub; it opens a pull request.
Report a problemA wrong address, type, scale or byte order.
Read the formatWhat each key of the file means (SPEC.md).