Unipi Technology Neuron M503 Modbus register map
Unipi Neuron M503 PLC: 10 digital inputs, 4 digital outputs, 5 relay outputs, 5 analog inputs, 5 analog outputs (I/O in 2 sections)
- Official
- 196 registers
- Modbus TCP
- Revision 3 · 2026-11-10
Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.
Communication
- Protocol
- Modbus TCP
- Unit ID
- 0
- TCP port
- 502
- Byte / word order
- ABCD · bytes big-endian, words high first
- Addresses
- 0-based
Connection values are defaults: the device may be configured differently.
Map
- Registers
- 166 holding registers, 30 coils
- Groups
- 16
- Translation tables
- 3
- Revision
- 3 · 2026-11-10
- Added
- ()
- File
- maps/unipi/neuron-m503.mbmap.json · 31 KB · history
- SHA-256
- db3e264c31e834819438dd5d4c53b625a7b9802bcc7495d73787486beacab268
- Manufacturer
- www.unipi.technology
Sources and notes
- Neuron M503 Modbus map · version 2.0 Registers and Coils sections and description tables; listed on https://kb.unipi.technology/en:hw:04-extensions:downloads
Source: Neuron M503 Modbus map v2.0, Unipi technology
- Addresses are those of the column 'Via Unit 0' (Modbus TCP unit id 0), where the sections of a Neuron controller share one address space: section 1 starts at 0, section 2 at 100, section 3 at 200, and so on. The document also gives per-section addresses for unit ids 1, 2 and 3, which are not used here.
- Unipi Neuron uses Modbus TCP. By default the Modbus server listens only on the loopback interface; it can be opened to other interfaces by changing its systemd script (document, Brief protocol description). The TCP port and the unit id used here are not stated in the document: 502 is the Modbus default.
- Registers marked Reserved or Obsolete in the document, and those named (Internal), are left out. Multi-register values are big-endian (most significant register first). The document types Real as a two-register floating point value, read here as float32; its text about half and single precision is ambiguous.
- Coils (suffix (coil)) repeat digital inputs, outputs and some settings that also appear as bits of holding registers. Analog values are in the unit selected by the analog input or output configuration register; the document gives no unit for them. Storage - Vendor specific 1 to 3 depend on the microSD card (Swissbit pSLC: card series, unrecoverable CRC errors, wear level threshold %).
- Some registers (the RS485 line configuration) have no address in the Via Unit 0 column; they are included for section 1 with the Via Unit 1 address, which is identical, and left out for the other sections. Registers whose name carries no I/O index are repeated in every section; the name then ends with (section N).
| Area | Address | Name | Type | Access | Unit | Scale | Description |
|---|---|---|---|---|---|---|---|
| HR | 0 | bool bit 0 | R | ||||
| HR | 0 | bool bit 1 | R | ||||
| HR | 0 | bool bit 2 | R | ||||
| HR | 0 | bool bit 3 | R | ||||
| HR | 1 | bool bit 0 | RW | ||||
| HR | 1 | bool bit 1 | RW | ||||
| HR | 1 | bool bit 2 | RW | ||||
| HR | 1 | bool bit 3 | RW | ||||
| HR | 5 | uint16 | R | ||||
| HR | 6 | bool bit 0 | RW | ||||
| HR | 6 | bool bit 1 | RW | ||||
| HR | 8 | uint32 ABCD | RW | ||||
| HR | 10 | uint32 ABCD | RW | ||||
| HR | 12 | uint32 ABCD | RW | ||||
| HR | 14 | uint32 ABCD | RW | ||||
| HR | 16 | uint16 | RW | ||||
| HR | 17 | uint16 | RW | ||||
| HR | 18 | uint16 | RW | ||||
| HR | 19 | uint16 | RW | ||||
| HR | 20 | bool bit 0 | RW | ||||
| HR | 20 | bool bit 1 | RW | ||||
| HR | 20 | bool bit 2 | RW | ||||
| HR | 20 | bool bit 3 | RW | ||||
| HR | 21 | bool bit 0 | RW | ||||
| HR | 21 | bool bit 1 | RW | ||||
| HR | 21 | bool bit 2 | RW | ||||
| HR | 21 | bool bit 3 | RW | ||||
| HR | 22 | bool bit 0 | RW | ||||
| HR | 22 | bool bit 1 | RW | ||||
| HR | 22 | bool bit 2 | RW | ||||
| HR | 22 | bool bit 3 | RW | ||||
| HR | 500 | uint16 | RW | ||||
| HR | 501 | uint16 | RW | ||||
| HR | 502 | uint16 | RW | ||||
| HR | 503 | uint16 | RW | ||||
| HR | 504 | uint16 | RW | ||||
| HR | 1000 | uint16 | R | ||||
| HR | 1001 | uint16 bits 0–7 | R | ||||
| HR | 1001 | uint16 bits 8–15 | R | ||||
| HR | 1002 | uint16 bits 0–3 | R | ||||
| HR | 1002 | uint16 bits 4–7 | R | ||||
| HR | 1002 | uint16 bits 8–15 | R | ||||
| HR | 1003 | uint16 | R | ||||
| HR | 1004 | uint16 | R | ||||
| HR | 1005 | uint32 ABCD | R | ||||
| HR | 1007 | bool bit 0 | RW | ||||
| HR | 1007 | bool bit 1 | RW | ||||
| HR | 1007 | bool bit 2 | RW | ||||
| HR | 1007 | bool bit 3 | RW | ||||
| HR | 1008 | uint16 | RW | ms | |||
| HR | 1009 | uint16 | R | ||||
| HR | 1010 | uint16 | RW | µs | ×100 | ||
| HR | 1011 | uint16 | RW | µs | ×100 | ||
| HR | 1012 | uint16 | RW | µs | ×100 | ||
| HR | 1013 | uint16 | RW | µs | ×100 | ||
| HR | 1014 | bool bit 0 | RW | ||||
| HR | 1014 | bool bit 1 | RW | ||||
| HR | 1014 | bool bit 2 | RW | ||||
| HR | 1014 | bool bit 3 | RW | ||||
| HR | 1015 | bool bit 0 | RW | ||||
| HR | 1015 | bool bit 1 | RW | ||||
| HR | 1015 | bool bit 2 | RW | ||||
| HR | 1015 | bool bit 3 | RW | ||||
| HR | 1016 | bool bit 0 | RW | ||||
| HR | 1016 | bool bit 1 | RW | ||||
| HR | 1016 | bool bit 2 | RW | ||||
| HR | 1016 | bool bit 3 | RW | ||||
| HR | 1017 | uint16 | RW | ||||
| HR | 1018 | uint16 | RW | ||||
| HR | 1019 | uint16 | RW | ||||
| HR | 1020 | uint16 | RW | ||||
| HR | 1021 | uint16 | RW | ||||
| HR | 1022 | uint16 | RW | ||||
| HR | 1023 | uint16 | RW | ||||
| HR | 1024 | uint16 | RW | ||||
| HR | 1025 | uint16 | RW | ||||
| HR | 1026 | uint16 | RW | ||||
| HR | 1027 | uint16 | RW | ||||
| HR | 1028 | uint16 | RW | ||||
| HR | 1029 | uint16 | RW | ||||
| HR | 1030 | uint16 | RW | ||||
| HR | 3000 | float32 ABCD | RW | ||||
| HR | 3002 | float32 ABCD | R | ||||
| HR | 4000 | uint16 | R | ||||
| HR | 4001 | uint16 | R | ||||
| HR | 4002 | uint16 | R | ||||
| HR | 4003 | uint16 | R | ||||
| HR | 4004 | uint16 | R | ||||
| HR | 4005 | uint16 | R | ||||
| HR | 100 | bool bit 0 | R | ||||
| HR | 100 | bool bit 1 | R | ||||
| HR | 100 | bool bit 2 | R | ||||
| HR | 100 | bool bit 3 | R | ||||
| HR | 100 | bool bit 4 | R | ||||
| HR | 100 | bool bit 5 | R | ||||
| HR | 101 | bool bit 0 | RW | ||||
| HR | 101 | bool bit 1 | RW | ||||
| HR | 101 | bool bit 2 | RW | ||||
| HR | 101 | bool bit 3 | RW | ||||
| HR | 101 | bool bit 4 | RW |
No registers match
Try part of the name, an address (decimal or 0x hex) or clear the filters.
Help improve this map
- I tested it on a deviceReport whether it worked, even if you did not write the map.
- Suggest a correctionEdit the file on GitHub; it opens a pull request.
- Report a problemA wrong address, type, scale or byte order.
- Read the formatWhat each key of the file means (SPEC.md).