Moxa ioLogik E1211 Modbus register map
Also covers ioLogik E1211-T
Remote Ethernet I/O with 16 digital outputs and a two-port Ethernet switch
- Official
- 141 registers
- Modbus TCP
- Revision 2 · 2026-10-17
- Identity: firmware
Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.
Communication
- Protocol
- Modbus TCP
- Unit ID
- 1
- TCP port
- 502
- Byte / word order
- ABCD · bytes big-endian, words high first
- Addresses
- 0-based
Connection values are defaults: the device may be configured differently.
Map
- Registers
- 49 holding registers, 11 input registers, 49 coils, 32 discrete inputs
- Groups
- 3
- Revision
- 2 · 2026-10-17
- Added
- ()
- File
- maps/moxa/iologik-e1211.mbmap.json · 22 KB · history
- SHA-256
- ebbe7a68527fbc2b82b32c35cbc612f967f1cf7e1b36158b55d1360d34002342
- Manufacturer
- moxa.com
Device identity
What a tool can read to check that this map fits the connected device (SPEC.md section 4.7). Registers with a role are read like any other register.
| Role | Register | Address | Type | Values |
|---|---|---|---|---|
| Firmware | Firmware version major | input 5029 | uint16 bits 8–15 | |
| Firmware | Firmware version minor | input 5029 | uint16 bits 0–7 | |
| Firmware | Firmware version patch | input 5030 | uint16 bits 8–15 |
Sources and notes
- ioLogik E1200 Series User Manual · version 16.1, 2024-04 Appendix A, Modbus/TCP default address mappings
Source: Moxa, "ioLogik E1200 Series User Manual", version 16.1 (April 2024), Appendix A
- Default Modbus/TCP address map (Appendix A). The addresses can be changed in the web console under user-defined Modbus addressing; this map fits the defaults.
- 32-bit values are high word first.
| Area | Address | Name | Type | Access | Unit | Scale | Description |
|---|---|---|---|---|---|---|---|
| CO | 0 | bool | RW | ||||
| CO | 1 | bool | RW | ||||
| CO | 2 | bool | RW | ||||
| CO | 3 | bool | RW | ||||
| CO | 4 | bool | RW | ||||
| CO | 5 | bool | RW | ||||
| CO | 6 | bool | RW | ||||
| CO | 7 | bool | RW | ||||
| CO | 8 | bool | RW | ||||
| CO | 9 | bool | RW | ||||
| CO | 10 | bool | RW | ||||
| CO | 11 | bool | RW | ||||
| CO | 12 | bool | RW | ||||
| CO | 13 | bool | RW | ||||
| CO | 14 | bool | RW | ||||
| CO | 15 | bool | RW | ||||
| CO | 16 | bool | RW | ||||
| CO | 17 | bool | RW | ||||
| CO | 18 | bool | RW | ||||
| CO | 19 | bool | RW | ||||
| CO | 20 | bool | RW | ||||
| CO | 21 | bool | RW | ||||
| CO | 22 | bool | RW | ||||
| CO | 23 | bool | RW | ||||
| CO | 24 | bool | RW | ||||
| CO | 25 | bool | RW | ||||
| CO | 26 | bool | RW | ||||
| CO | 27 | bool | RW | ||||
| CO | 28 | bool | RW | ||||
| CO | 29 | bool | RW | ||||
| CO | 30 | bool | RW | ||||
| CO | 31 | bool | RW | ||||
| HR | 32 | uint16 | RW | Bit n = DO n (DO-00 in bit 0) | |||
| HR | 36 | uint16 | RW | ||||
| HR | 37 | uint16 | RW | ||||
| HR | 38 | uint16 | RW | ||||
| HR | 39 | uint16 | RW | ||||
| HR | 40 | uint16 | RW | ||||
| HR | 41 | uint16 | RW | ||||
| HR | 42 | uint16 | RW | ||||
| HR | 43 | uint16 | RW | ||||
| HR | 44 | uint16 | RW | ||||
| HR | 45 | uint16 | RW | ||||
| HR | 46 | uint16 | RW | ||||
| HR | 47 | uint16 | RW | ||||
| HR | 48 | uint16 | RW | ||||
| HR | 49 | uint16 | RW | ||||
| HR | 50 | uint16 | RW | ||||
| HR | 51 | uint16 | RW | ||||
| HR | 52 | uint16 | RW | ms | |||
| HR | 53 | uint16 | RW | ms | |||
| HR | 54 | uint16 | RW | ms | |||
| HR | 55 | uint16 | RW | ms | |||
| HR | 56 | uint16 | RW | ms | |||
| HR | 57 | uint16 | RW | ms | |||
| HR | 58 | uint16 | RW | ms | |||
| HR | 59 | uint16 | RW | ms | |||
| HR | 60 | uint16 | RW | ms | |||
| HR | 61 | uint16 | RW | ms | |||
| HR | 62 | uint16 | RW | ms | |||
| HR | 63 | uint16 | RW | ms | |||
| HR | 64 | uint16 | RW | ms | |||
| HR | 65 | uint16 | RW | ms | |||
| HR | 66 | uint16 | RW | ms | |||
| HR | 67 | uint16 | RW | ms | |||
| HR | 68 | uint16 | RW | ms | |||
| HR | 69 | uint16 | RW | ms | |||
| HR | 70 | uint16 | RW | ms | |||
| HR | 71 | uint16 | RW | ms | |||
| HR | 72 | uint16 | RW | ms | |||
| HR | 73 | uint16 | RW | ms | |||
| HR | 74 | uint16 | RW | ms | |||
| HR | 75 | uint16 | RW | ms | |||
| HR | 76 | uint16 | RW | ms | |||
| HR | 77 | uint16 | RW | ms | |||
| HR | 78 | uint16 | RW | ms | |||
| HR | 79 | uint16 | RW | ms | |||
| HR | 80 | uint16 | RW | ms | |||
| HR | 81 | uint16 | RW | ms | |||
| HR | 82 | uint16 | RW | ms | |||
| HR | 83 | uint16 | RW | ms | |||
| DI | 4096 | bool | R | ||||
| DI | 4097 | bool | R | ||||
| DI | 4098 | bool | R | ||||
| DI | 4099 | bool | R | ||||
| DI | 4100 | bool | R | ||||
| DI | 4101 | bool | R | ||||
| DI | 4102 | bool | R | ||||
| DI | 4103 | bool | R | ||||
| DI | 4104 | bool | R | ||||
| DI | 4105 | bool | R | ||||
| DI | 4106 | bool | R | ||||
| DI | 4107 | bool | R | ||||
| DI | 4108 | bool | R | ||||
| DI | 4109 | bool | R | ||||
| DI | 4110 | bool | R | ||||
| DI | 4111 | bool | R | ||||
| DI | 4112 | bool | R | ||||
| DI | 4113 | bool | R | ||||
| DI | 4114 | bool | R |
No registers match
Try part of the name, an address (decimal or 0x hex) or clear the filters.
Help improve this map
- I tested it on a deviceReport whether it worked, even if you did not write the map.
- Suggest a correctionEdit the file on GitHub; it opens a pull request.
- Report a problemA wrong address, type, scale or byte order.
- Read the formatWhat each key of the file means (SPEC.md).