Moxa ioLogik E1212 Modbus register map
Also covers ioLogik E1212-T
Remote Ethernet I/O with 8 digital inputs, 8 configurable DIO channels and a two-port Ethernet switch
- Official
- 174 registers
- Modbus TCP
- Revision 2 · 2026-10-17
- Identity: firmware
Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.
Communication
- Protocol
- Modbus TCP
- Unit ID
- 1
- TCP port
- 502
- Byte / word order
- ABCD · bytes big-endian, words high first
- Addresses
- 0-based
Connection values are defaults: the device may be configured differently.
Map
- Registers
- 25 holding registers, 28 input registers, 73 coils, 48 discrete inputs
- Groups
- 5
- Revision
- 2 · 2026-10-17
- Added
- ()
- File
- maps/moxa/iologik-e1212.mbmap.json · 28 KB · history
- SHA-256
- a60df1ee18022faaae6ba1170470b405ab9707337221b2e095d9283243154f08
- Manufacturer
- moxa.com
Device identity
What a tool can read to check that this map fits the connected device (SPEC.md section 4.7). Registers with a role are read like any other register.
| Role | Register | Address | Type | Values |
|---|---|---|---|---|
| Firmware | Firmware version major | input 5029 | uint16 bits 8–15 | |
| Firmware | Firmware version minor | input 5029 | uint16 bits 0–7 | |
| Firmware | Firmware version patch | input 5030 | uint16 bits 8–15 |
Sources and notes
- ioLogik E1200 Series User Manual · version 16.1, 2024-04 Appendix A, Modbus/TCP default address mappings
Source: Moxa, "ioLogik E1200 Series User Manual", version 16.1 (April 2024), Appendix A
- Default Modbus/TCP address map (Appendix A). The addresses can be changed in the web console under user-defined Modbus addressing; this map fits the defaults.
- 32-bit values are high word first.
- DI 0-7 are the DI channels and DI 8-15 the DIO channels set as inputs; DO 0-7 are the DIO channels set as outputs.
| Area | Address | Name | Type | Access | Unit | Scale | Description |
|---|---|---|---|---|---|---|---|
| DI | 0 | bool | R | ||||
| DI | 1 | bool | R | ||||
| DI | 2 | bool | R | ||||
| DI | 3 | bool | R | ||||
| DI | 4 | bool | R | ||||
| DI | 5 | bool | R | ||||
| DI | 6 | bool | R | ||||
| DI | 7 | bool | R | ||||
| DI | 8 | bool | R | ||||
| DI | 9 | bool | R | ||||
| DI | 10 | bool | R | ||||
| DI | 11 | bool | R | ||||
| DI | 12 | bool | R | ||||
| DI | 13 | bool | R | ||||
| DI | 14 | bool | R | ||||
| DI | 15 | bool | R | ||||
| IR | 48 | uint16 | R | Bit n = DI n (DI-00 in bit 0) | |||
| IR | 16 | uint32 ABCD | R | ||||
| IR | 18 | uint32 ABCD | R | ||||
| IR | 20 | uint32 ABCD | R | ||||
| IR | 22 | uint32 ABCD | R | ||||
| IR | 24 | uint32 ABCD | R | ||||
| IR | 26 | uint32 ABCD | R | ||||
| IR | 28 | uint32 ABCD | R | ||||
| IR | 30 | uint32 ABCD | R | ||||
| IR | 32 | uint32 ABCD | R | ||||
| IR | 34 | uint32 ABCD | R | ||||
| IR | 36 | uint32 ABCD | R | ||||
| IR | 38 | uint32 ABCD | R | ||||
| IR | 40 | uint32 ABCD | R | ||||
| IR | 42 | uint32 ABCD | R | ||||
| IR | 44 | uint32 ABCD | R | ||||
| IR | 46 | uint32 ABCD | R | ||||
| CO | 256 | bool | RW | ||||
| CO | 257 | bool | RW | ||||
| CO | 258 | bool | RW | ||||
| CO | 259 | bool | RW | ||||
| CO | 260 | bool | RW | ||||
| CO | 261 | bool | RW | ||||
| CO | 262 | bool | RW | ||||
| CO | 263 | bool | RW | ||||
| CO | 264 | bool | RW | ||||
| CO | 265 | bool | RW | ||||
| CO | 266 | bool | RW | ||||
| CO | 267 | bool | RW | ||||
| CO | 268 | bool | RW | ||||
| CO | 269 | bool | RW | ||||
| CO | 270 | bool | RW | ||||
| CO | 271 | bool | RW | ||||
| CO | 272 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 273 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 274 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 275 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 276 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 277 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 278 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 279 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 280 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 281 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 282 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 283 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 284 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 285 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 286 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 287 | bool | RW | Write 1 to reset the counter to its initial value | |||
| CO | 288 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 289 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 290 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 291 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 292 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 293 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 294 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 295 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 296 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 297 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 298 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 299 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 300 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 301 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 302 | bool | RW | Write 1 to clear the overflow flag | |||
| CO | 303 | bool | RW | Write 1 to clear the overflow flag | |||
| DI | 1000 | bool | R | ||||
| DI | 1001 | bool | R | ||||
| DI | 1002 | bool | R | ||||
| DI | 1003 | bool | R | ||||
| DI | 1004 | bool | R | ||||
| DI | 1005 | bool | R | ||||
| DI | 1006 | bool | R | ||||
| DI | 1007 | bool | R | ||||
| DI | 1008 | bool | R | ||||
| DI | 1009 | bool | R | ||||
| DI | 1010 | bool | R | ||||
| DI | 1011 | bool | R | ||||
| DI | 1012 | bool | R | ||||
| DI | 1013 | bool | R | ||||
| DI | 1014 | bool | R | ||||
| DI | 1015 | bool | R | ||||
| CO | 0 | bool | RW | ||||
| CO | 1 | bool | RW | ||||
| CO | 2 | bool | RW |
No registers match
Try part of the name, an address (decimal or 0x hex) or clear the filters.
Help improve this map
- I tested it on a deviceReport whether it worked, even if you did not write the map.
- Suggest a correctionEdit the file on GitHub; it opens a pull request.
- Report a problemA wrong address, type, scale or byte order.
- Read the formatWhat each key of the file means (SPEC.md).