Moxa ioLogik E2210 Modbus register map

Also covers ioLogik E2210-T

Ethernet micro controller with 12 digital inputs and 8 digital outputs (Click&Go logic)

Official
368 registers
Modbus TCP
Revision 2 · 2026-10-17

Official: Written from the manufacturer's documentation, but not tested on a device yet. Check the map against the manufacturer's documentation before you write to a live device. Tested it? Report a test.

Download .mbmap.json Raw JSON View on GitHub Suggest a correction Report a problem

Communication

Protocol: Modbus TCP
Unit ID: 1
TCP port: 502
Byte / word order: ABCD · bytes big-endian, words high first
Addresses: 0-based

Connection values are defaults: the device may be configured differently.

Map

Registers: 224 holding registers, 12 input registers, 120 coils, 12 discrete inputs
Groups: 3
Revision: 2 · 2026-10-17
Added: 2026-10-14 (2026-10-14)
File: maps/moxa/iologik-e2210.mbmap.json · 62 KB · history
SHA-256: c1ac102c5ba7fd3f970212ecf0134b394963cbe07619f211fc4fc6cae1353a71
Manufacturer: moxa.com

Sources and notes

ioLogik E2200 Series User Manual · version 7.2, 2022-07
Appendix I, ioLogik E2210 Modbus mapping

Source: Moxa, "ioLogik E2200 Series User Manual", version 7.2 (July 2022), Appendix I

Modbus/TCP address map from Appendix I of the manual. Many values appear twice, as a coil or discrete input and again as a holding register (names ending in "(register)").
32-bit values are two registers; the manual lists the high word first unless the register says otherwise.
Not in this map: the DI counter mode values at holding 0x0D00, which the manual lists as two-word values at consecutive addresses.

Area	Address	Type	Access	Description
CO	0	bool	RW
CO	1	bool	RW
CO	2	bool	RW
CO	3	bool	RW
CO	4	bool	RW
CO	5	bool	RW
CO	6	bool	RW
CO	7	bool	RW
CO	8	bool	RW
CO	9	bool	RW
CO	10	bool	RW
CO	11	bool	RW
CO	12	bool	RW
CO	13	bool	RW
CO	14	bool	RW
CO	15	bool	RW
CO	16	bool	RW
CO	17	bool	RW
CO	18	bool	RW
CO	19	bool	RW
CO	20	bool	RW
CO	21	bool	RW
CO	22	bool	RW
CO	23	bool	RW
CO	24	bool	RW
CO	25	bool	RW
CO	26	bool	RW
CO	27	bool	RW
CO	28	bool	RW
CO	29	bool	RW
CO	30	bool	RW
CO	31	bool	RW
CO	32	bool	RW
CO	33	bool	RW
CO	34	bool	RW
CO	35	bool	RW
CO	36	bool	RW
CO	37	bool	RW
CO	38	bool	RW
CO	39	bool	RW
CO	40	bool	RW
CO	41	bool	RW
CO	42	bool	RW
CO	43	bool	RW
CO	44	bool	RW
CO	45	bool	RW
CO	46	bool	RW
CO	47	bool	RW
CO	48	bool	RW
CO	49	bool	RW
CO	50	bool	RW
CO	51	bool	RW
CO	52	bool	RW
CO	53	bool	RW
CO	54	bool	RW
CO	55	bool	RW
CO	56	bool	RW
CO	57	bool	RW
CO	58	bool	RW
CO	59	bool	RW
CO	60	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	61	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	62	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	63	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	64	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	65	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	66	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	67	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	68	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	69	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	70	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	71	bool	RW	Read: Always 0 Write: 1 : Clear Counter Value 0 : Return Illegal Data Value
CO	72	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	73	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	74	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	75	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	76	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	77	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	78	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	79	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	80	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	81	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	82	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	83	bool	RW	Read: 0 : Normal 1 : Overflow Write: 0 : Clear Overflow Status 1 : Return Illegal Data Value
CO	84	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	85	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	86	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	87	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	88	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	89	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	90	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	91	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	92	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	93	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	94	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	95	bool	RW	Read: 0 : Normal 1 : Trigger Write: 0 : Clear Trigger Status 1 : Return Illegal Data Value
CO	96	bool	RW
CO	97	bool	RW
CO	98	bool	RW
CO	99	bool	RW

Help improve this map

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Suggest a correctionEdit the file on GitHub; it opens a pull request.
Report a problemA wrong address, type, scale or byte order.
Read the formatWhat each key of the file means (SPEC.md).